1. Field of the Disclosure
The present invention relates to liquid crystal display devices, and more particularly, to a liquid crystal display device and a method for manufacturing the same, in which dim block caused by overlays is prevented at blue pixels having upside down inverted structures with respect to one another in a Z-type driving in which a signal is applied to data lines in zigzag.
2. Discussion of the Related Art
Currently, as information oriented times has come, the field of display which visually displays electric information signal has developed rapidly, and, to meet the development, various flat display devices with excellent features of thin, light weight, and low power consumption have been developed, and replace the present cathode ray tube CRT, rapidly.
As examples of the flat display devices, there are liquid crystal display device LCD, plasma display panel device PDP, field emission display device FED, electroluminescence display device ELD, and so on, all of which require a flat display panel essentially for displaying an image. The flat display panel has one pair of transparent insulating substrates bonded opposite to each other with a light emitting or polarizing material layer placed therebetween.
Of the flat display devices, the liquid crystal display device controls a light transmissivity of liquid crystals by using an electric field for displaying the image. For this, the image display device is provided with a display panel having liquid crystal cells, and a back light unit for directing a light to the display panel, and a driving circuit for driving the back light unit and the liquid crystal cells.
The display panel has a plurality of gate lines and a plurality of data lines formed to cross each other to define a plurality of pixel regions. Each of the pixel regions is provided with a thin film transistor array substrate and a color filter substrate arranged to face each other, spacers for maintaining a cell gap between the two substrates, and liquid crystals filled in the cell gap.
The thin film transistor array substrate is provided with the gate lines and the data lines, a thin film transistor formed at every crossing portion of the gate lines and the data lines as a switching device, a pixel electrode for each liquid crystal cell and connected to the thin film transistor, and an alignment film coated thereon. The gate lines and the data lines have signals applied thereto from relevant driving circuits through relevant pads.
The thin film transistor supplies a pixel voltage signal which is supplied to the data lines in response to a scan signal supplied to the gate line to the pixel electrode.
The color filter array substrate is provided with a color filter formed for each of the liquid crystal cells, a black matrix for definition of the color filters and reflection of external lights, a common electrode for supplying a reference voltage to the liquid crystal cells in common, and the alignment film coated thereon.
The thin film transistor substrate and the color filter array substrate fabricated separately thus are aligned, bonded to face each other, have liquid crystals injected therebetween, and sealed, to complete fabrication of the liquid crystal display panel.
The liquid crystal display device may have different adjacent pixel configurations depending on a driving system. The different pixel configurations cause problems coming from overlay.
A Z-type driving liquid crystal display device will be described with reference to the attached drawings.
FIG. 1 illustrates a circuitry diagram of a general Z-type driving liquid crystal display device.
Referring to FIG. 1, a Z-inversion type driving liquid crystal display device has a matrix of unit pixels, and R, G, B unit pixels therein form a pixel.
A pair of adjacent gate lines are formed in a first direction (transverse direction), spaced from each other by one unit pixel distance away.
Data lines are formed in a second direction perpendicular to the pair of gate lines spaced from each other by two unit pixel distances away in a longitudinal direction.
Thin film transistors are formed between gate lines and data lines different from each other at unit pixels on both sides of the data line.
The data line is formed at every second unit pixels, and the R, G, B unit pixels are repeated at every third unit pixels, wherein it can be known that the thin film transistor is arranged, not at the same positions for all the unit pixels of the same color, but in the same fashion repeatedly for every six pixels.
The six unit pixel has two R, G, B pixels respectively, wherein it can be known that positions of the thin film transistors for the two R unit pixels and two G unit pixels are, not only, different from each other in left side or right side thereof, but also positions of the thin film transistors for the B unit pixels are inverted both in an upper side and lower side, and in left side and right side.
Problems caused at the B unit pixels having the inverted pixel configuration will be reviewed.
FIG. 2 illustrates a plan view of common lines for the upper/lower side inverted pixels.
Referring to FIG. 2, the unit pixel on the left side has the thin film transistor formed between the gate line Gn and the data line Dm on a lower side, and the unit pixel on the right side has the thin film transistor formed between the gate line Gn−1 and the data line Dm+p on an upper side.
The common line 106a, 106b and 106c overlap at edges of the pixel electrodes 103a and 103b of the unit pixels between the pair of the gate lines, and are extended in a direction of the gate line, wherein storage capacitors are defined at regions the pixel electrodes 103a and 103b overlap, respectively. The common lines 106a and 106b at the unit pixels are connected with a common line connection portion 106c between the unit pixels, and extended to opposite sides like the gate lines for having a signal applied thereto.
In the meantime, if alignment between layers (particularly, between the common line and the pixel electrode) is accurate, an area of overlap between the common line 106a and the pixel electrode 103a at the right side pixel can be the same with an area of overlap between the common line 106b and the pixel electrode 103b at the left side pixel. However, if an upward or downward overlay takes place, to cause increase of an overlap area at one unit pixel and decrease of the overlap area at the other unit pixel resulting in decrease of storage capacitance, a difference of storage capacitance values between the unit pixels can become great, which causes dim block
In this case, despite of the upper/lower inversion and left/right inversion, the pixels arranged side by side shown in FIG. 2 has an influence from upper/lower overlay relatively greater than an influence from left/right overlay. With regard to this, reviewing the drawing, an inference can be drawn that the dim block is caused by the difference of the storage capacitances of the pixels having a different configuration, as the common lines 106a and 106b overlap with the pixel electrodes 103a and 103b on both sides of left side and right side of the unit pixels respectively, and the common lines 106a and 106b overlap with the pixel electrodes 103a and 103b on one side of the unit pixels on an upper or lower side, respectively.
The general Z-type driving liquid crystal display device has the following problems.
In the Z-type driving liquid crystal display device, the R and G unit pixels have a left/right inverted pixel structure, and B unit pixel has upper/lower and left/right inverted structure.
In this case, due to configuration of the common lines overlap on left/right side of the pixel electrodes or on either upper side or lower side of the pixel electrode, the difference of storage capacitances for the B pixel lines of the upper/lower inverted pixel structure becomes great, to cause the dim block of the blue pixels.